Package Development Engineer

Interuniversitair Micro-Electronica Centrum VZW· Arr. Leuven· EURES· опубліковано 14.07.2026
Обов'язково:Backend

This position can be in Heilbronn and in Leuven

What you will do

Your assignment consists of the following tasks:

  • Package Selection and Analysis Select an appropriate IC package type based on the given specifications and IC

requirements. Perform a comprehensive analysis of the chosen package's electrical characteristics. Identify any limitations or potential issues that may arise during the design process.

  • Electrical Performance Optimization Optimize the electrical performance of the IC package by focusing on signal

integrity, power integrity, and electromagnetic compatibility (EMC). Analyze the routing, parasitic effects, and noise issues associated with the package. Propose design modifications or enhancements to improve electrical performance.

  • Design for Manufacturability and Cost OptimizationConsider manufacturability and cost optimization aspects of

the IC package design. Review the design for compatibility with manufacturing processes, assembly requirements, and materials availability. Suggest design modifications to streamline the manufacturing process while maintaining or reducing overall costs.

  • Documentation and ReportingProduce a comprehensive report summarizing your analysis, design modifications, and

optimization recommendations for the IC package. Include detailed diagrams, simulations, calculations, and experimental results where applicable. Clearly communicate the rationale behind your design decisions and their potential impact on the IC's performance and reliability.

Who you are

  • MSc in the field of electronics & equivalent with at least 5 years of experience in packaging design as well as SIPI analysis
  • Knowledge in Cadence layout tools
  • Knowledge in Ansys simulation tools
  • Knowledge in 2.5D/3D packaging, backend silicon layout (place & route)
  • To be able to communicate in English is a must