Senior / Analog Layout Engineer

Main Responsibilities

• Design layout for analog, digital and mixed-signal circuits.
• Own layout of major custom IP blocks.
• Work closely with analog designers on floorplanning and layout implementation.
• Physical and electrical verification include DRC, LVS, EM/IR, ERC, PERC Latch up and PERC ESD
• Review resource deliverables and ensure quality/milestone completion.
• Plan schedules and drive assigned blocks to meet project timelines.

Main Requirements

• Degree in Electrical/ Electronics/ Computer Engineering or equivalent with minimum 3 years of relevant experiences.
• Must have knowledge of CMOS circuit theory
• Solid experience in analog layout design
• Layout design and verification experience using Cadence Virtuoso and Mentor Calibre
• Experience in LVS, DRC, ERC, ANT, ESD, Latch-up, EMIR and Reliability
• Good understanding of signal and clock shielding and isolation techniques
• Good communication skill and team player

We invite qualified candidates to apply online or email your CV to resume@aurexis-tech.com