Senior FPGA Design Engineer / Hardware Engineer

Maven· London· greenhouse· objavljeno 29. 10. 2024
Obvezno:PythonHealthTech

Maven is a market-leading proprietary trading firm deploying its own capital across discretionary, systematic, and market-making strategies. Backed by deep expertise in trading, technology, and research, we are relentlessly focused on improving liquidity across global listed derivatives. Through advanced execution and pricing technologies, we improve how financial markets operate.

Overview:

Where technology meets trading, the Maven FPGA team is pushing the bleeding edge of hardware and proprietary designs to maintain and gain advantage in an increasingly competitive environment. With operations in London, New York, Hong Kong and Chicago, we build technology in support of global trading operations across multiple exchanges, asset classes, and trading strategies. Our teams are small and nimble, with a firm commitment to growth, and a strategic view of investment in people, tools, and the necessary platforms to extend our leadership.

The Role:

Within our team, you will work with traders and technologists to seek and exploit opportunities to gain competitive advantage through FPGA systems. By means of reduced latencies, higher throughput, or increased robustness, you will enable the company to increase the efficiency of existing strategies and open up entirely new trading opportunities previously inaccessible. With a number of greenfield projects in scope, candidates who are proactive and self-driven can grow into leadership roles for the firm’s future. Whilst financial experience is a plus, your engineering talents, problem solving abilities, and eagerness to take on new challenges are of significantly higher importance to us.

The skills you will have:

SystemVerilog

Source control management

5+ years FPGA experience

Automated verification

HLS or other DSP flow experience for FPGA

Comfortable attacking new and unfamiliar problems

Interest in trading

Things we would like to see but are not essential:

Python, TCL

Low latency design

ASIC

Network and packet processing

Financial market data

Trading systems

Software development

WHAT WE OFFER

Competitive compensation

Group Pension plan

Annual discretionary bonus

Fully catered breakfast, lunch and snacks.

25 days’ annual leave

Informal dress code

Private healthcare and life assurance

Cycle-to-work scheme

Monthly company events

Private Gym