Senior IC Logic Design / STA Engineer

FOCALTRANS PTE. LTD.Singaporemycareersfuturepaskelbta 2026-10-01
Senior

Job Responsibilities Responsible for logic synthesis, LEC and ECO implementation , as well as quality control throughout the development process. Work closely with the front-end design team to establish timing constraints and ensure timely timing closure. Responsible for full-chip STA execution and timing constraint quality control , working closely with the back-end design team to complete timing sign-off . Job Requirements Bachelor’s degree or above in Computer Engineering, Electrical/Electronic Engineering, Communications Engineering or a related discipline, with 8+ years of relevant industry experience . Strong proficiency in SDC and hands-on experience with Design Compiler (DC), Formality and PrimeTime (PT) , with solid Tcl scripting skil