Foundation IP Memory Verification Engineer

Company Overview

Broadcom Inc. is a global technology leader designing and supplying semiconductor and infrastructure software solutions for data center, networking, software, broadband, wireless, storage, and industrial markets. Learn more at www.broadcom.com.

Job Summary

Join the Central Engineering Group as a design engineer to develop foundation IP for AI products, focusing on memory compilers, logic cells, and custom macros using advanced process technology.

Responsibilities

• Contribute to Memory Design Validation for custom memory macros and memory compilers to ensure design accuracy and performance
• Perform functional verification to identify and resolve design discrepancies through root cause analysis
• Conduct signal integrity analysis to detect design weaknesses and propose effective solutions
• Execute transistor level simulations to identify and resolve Power Up or Lock up issues
• Perform EM/IR analysis and simulations to assess impact on timing and internal margins
• Validate timing and internal margins through transistor level simulations, identify characterization gaps, and implement fixes
• Conduct QA and validation checks to ensure accuracy of timing and power models
• Develop automation scripts to streamline verification flow and data analysis processes
• Support silicon debug activities and correlate findings with spice models
• Collaborate with memory designers to co-develop and enhance memory characterization and validation workflows
• Coordinate with memory design leads, modelling leads, and managers to define and implement the memory validation plan

Preferred competencies and qualifications

• Understanding of transistor level circuit behavior and device physics to support detailed analysis
• Knowledge of signal integrity, EM/IR, and reliability analysis to improve design robustness
• Proficiency in running simulators and writing automation scripts to enhance verification efficiency
• Familiarity with memory behavioral and physical models to aid validation efforts
• Expertise in memory circuit design to contribute to advanced design tasks
• Understanding of DFT schemes and chip-level integration to support design for testability
• Strong communication, interpersonal, and leadership skills to collaborate effectively within teams
• Self-motivated with the ability to multitask and manage competing priorities
• Passion for solving complex problems and eagerness to learn new technologies

Qualifications Bachelor’s degree in Electronics or Computer Engineering with a minimum of 5 years of experience in memory circuit design and validation.