R&D Group Manager – Compute Platforms & Silicon Prototypes

Lead the team that turns breakthrough compute architectures into working silicon for the future of AI, high-performance computing and automotive systems.

About the role

What if you could lead the team that transforms breakthrough chip architectures into real silicon? At imec, you will manage a multidisciplinary group developing advanced compute platforms and silicon prototypes that explore the future of artificial intelligence, high-performance computing (HPC) and automotive systems. Your work will help define how next-generation chips are designed, integrated and manufactured beyond today's conventional system-on-chip approaches. You will combine scientific leadership, people management and technology vision in one of the world's leading semiconductor research environments.

What you will do

As R&D Group Manager, you will lead a team of architects and engineers developing advanced compute systems from concept to silicon validation. You will:

• Lead a team of chip architects, silicon designers and R&D engineers.
• Translate novel computing concepts into manufacturable silicon demonstrators.
• Drive the development of next-generation compute platforms based on RISC-V and chiplet-based architectures.
• Guide projects across the complete development cycle, from architectural exploration to prototype fabrication.
• Enable close collaboration between architecture, software, design technology and silicon implementation experts.
• Build a high-performing team by coaching, mentoring and developing researchers and engineers.
• Help shape imec's vision for future 3D-integrated computing systems.

Who you are

You combine deep technical expertise with strong people leadership. You bring:

Must-have

• 10+ years of experience in digital system architecture and semiconductor design.
• Solid understanding of advanced chip and compute-system development.
• Experience with RISC-V or similar processor architectures.
• Previous experience leading engineers, researchers or technical experts.
• Strong communication skills and fluency in English.

Nice-to-have

• Experience with chiplet-based architectures and die-to-die interconnect technologies.
• Knowledge of hardware modelling and hardware generation methodologies.
• Experience with advanced verification methodologies and design automation flows.