Senior Engineer - IC Design

Digital IC Design

Perform Verilog RTL design to meet product specifications and requirements

Perform Logic Synthesis, Static Timing Analysis

Work with Physical designer to achieve timing closure

Work with Systems and Software engineers on FPGA verification

Lead DFT related activities - Scan Insertion, ATPG, Pattern Validation

Work with test team in debugging production test issues

Help debug & correct any functional issues found in taped-out devices

Participate in design reviews, support ISO processes and documentation

Additional Responsibilities

Any reasonable task assigned by management and deemed to be within the individuals’ capabilities to ensure smooth running of the business.

As this is an evolving business, ongoing change is an integral part of the position. Management will liaise with the individual on any fundamental change to work practices. The individual is required to embrace and adopt any change to working practices.

Knowledge and Skill Requirements

Degree/Master in Electrical/Electronic Engineering

5 years or above experience in the area of digital IC design

Working experience from design to tape-out are essential

Experience in Verilog HDL and VHDL RTL design, Logic Synthesis, DFT, ATPG, Timing Closure

Experience in using EDA tools from Cadence, Synopsys

Knowledge and working experience in one or more of the following:

• Digital and mixed-signal design

• USB interface products

• Knowledge in connectivity technology such as USB, UART, SPI, I2C

• Project Management