Drive leading-edge process and device development and optimization for RF-SOI technologies to meet scaling, performance, reliability, and manufacturability requirements.
Design innovative semiconductor devices using extensive Technology Computer-Aided Design (TCAD) simulations to optimize device performance and ensure reliability.
Collaborate with layout engineers to design and tape out various device structures and identify optimal layout styles for parameterized cells (PCells).
Conduct comprehensive device characterization, data analysis, and reliability assessments using laboratory bench-testing equipment.
Work closely with RF engineers to optimize RF performance and establish best-known methods (BKMs) for device implementation.
Collaborate with modeling and PDK teams on design enablement, device model validation, and PCell validation.
Provide technical guidance to internal and external design teams on selecting suitable devices, including device types and geometries, to support successful design wins.
Analyze device performance data, identify improvement opportunities, and implement device-tuning strategies to meet technology and customer requirements.
Support continuous improvement in device performance, reliability, and design enablement through data-driven engineering analysis.
Requirements
Strong knowledge of semiconductor device physics and an in-depth understanding of device characteristics and device-tuning techniques.
Hands-on experience in one or more of the following areas:
TCAD process and device simulation, including calibration.
Semiconductor DC or RF bench testing and characterization.
Advanced RF-SOI CMOS technology development.
Understanding of RF device performance, semiconductor reliability, and device optimization.
Familiarity with device layout, tape-out, PCells, device modeling, or PDK validation is advantageous.
Strong analytical, problem-solving, and data interpretation skills.
Good communication and interpersonal skills to collaborate effectively with cross-functional engineering teams and external design partners.