Senior/Yield Engineer

About the company

STATS ChipPAC is a leading provider of semiconductor packaging and test services. We are committed to delivering innovative engineering solutions and maintaining excellence in manufacturing processes. Our team of skilled engineers and technicians work collaboratively to push the boundaries of what's possible in semiconductor technology, serving clients across diverse industries and markets worldwide.

Your tasks

About the role Solves difficult problems through assessment of various techniques and approaches to develop appropriate, creative and practical solutions. Solutions typically result in improved products, processes or quality. Provide leadership to make a difference.

• Conduct detailed yield analysis to improve product quality and drive manufacturing efficiency and profitability
• Collaborate with cross-functional teams (Process, Equipment, QA, etc.) to drive yield improvement initiatives and support continuous improvement projects
• Lead yield-related audits and reviews, including preparation of documentation and presentation of findings to internal stakeholders and external customers
• Liaise with customers on development and improvement of process, material and equipment capabilities
• Generate and maintain weekly yield reports to monitor production performance, highlight trends and identify anomalies or deviations
• Conduct yield analysis to identify yield loss mechanisms, quality issues, and opportunities for process improvement
• Drive yield improvement initiatives through root cause analysis and implementation of corrective and preventive actions (CAPA)
• Monitor and report yield performance through regular dashboards and trend analysis, highlighting risks and improvement opportunities
• Lead yield-related investigations, audits, and customer reviews, including preparation of technical reports and presentations
• Support customer engagements, process qualifications, and continuous improvement projects to enhance process, material, and equipment capabilities

Requirements

• Bachelor's degree in Mechanical Engineering, Electrical Engineering, or a related field
• 2-5 years of relevant experience in semiconductor process engineering / yield engineering preferred
• Knowledge of Wafer Level Chip Scale Packaging (WLCSP) operations is advantageous
• Proficient in data analysis and reporting tools such as Microsoft Excel, JMP, Tableau or Python or Fine Bi
• Project management skills to ensure timely and successful project delivery
• Independent self-starter to drive to meet operation goals
• High level of commitment and passion