FPGA Hardware Acceleration Researcher
Your tasks
About the Role We are looking for an experienced FPGA Hardware Acceleration Engineer to design, implement, and deploy high-performance compute pipelines on modern heterogeneous FPGA platforms, including AMD Versal AI Edge.
You will be responsible for the end-to-end hardware acceleration pipeline, from RTL/HLS development and simulation through synthesis, timing closure, and physical board bring-up. You will work closely with AI researchers and embedded software engineers to translate algorithms into efficient, low-latency, and deterministic hardware implementations.
- Design and implement custom FPGA compute engines and high-throughput streaming data paths using Verilog/SystemVerilog or C/C++ HLS.
- Develop and optimize memory and data-transfer interfaces, including AXI4, AXI-Stream, DMA, DDR4/LPDDR, and related architectures.
- Perform logic synthesis, place-and-route, timing analysis, and timing closure using AMD Vivado, Vitis, and Vitis AI.
- Bring up and validate FPGA designs on physical evaluation boards and hardware-in-the-loop test environments.
- Debug hardware issues using logic analyzers and on-chip debugging tools.
- Integrate FPGA acceleration kernels with ARM-based host processors and embedded software stacks.
- Optimize hardware architectures for throughput, latency, resource utilization, memory bandwidth, and deterministic execution.
- Collaborate with AI/ML researchers and software engineers to map computational workloads onto FPGA-based acceleration platforms.
Requirements
- Master’s degree or above in Electrical/Electronic Engineering, Computer Engineering, Computer Science, or a related field.
- Hands-on experience taking FPGA designs through the complete development cycle, including RTL/HLS, simulation, synthesis, implementation, and on-board validation.
- Strong programming and hardware design skills in Verilog/SystemVerilog, VHDL, or C/C++ HLS.
- Practical experience with AMD Vivado/Vitis or equivalent FPGA development tools.
- Solid understanding of FPGA architecture, pipelining, parallel processing, memory hierarchy, and hardware optimization.
- Strong knowledge of AXI4 / AXI-Stream and high-performance data movement architectures.
- Experience with DMA, PCIe, DDR4/LPDDR, or other high-speed memory and I/O interfaces.
- Experience with hardware debugging, board bring-up, and timing closure.
Preferred Qualifications
- Experience with AMD Versal, Versal AI Edge, Zynq UltraScale+, or other heterogeneous FPGA platforms.
- Experience accelerating AI/ML, computer vision, signal processing, or other compute-intensive workloads on FPGA.
- Familiarity with Vitis AI, FPGA-based AI acceleration, or heterogeneous CPU/FPGA architectures.
- Experience integrating FPGA accelerators with ARM processors or embedded Linux systems.
- Strong understanding of performance optimization and hardware/software co-design.