HPC SoC Interconnect Design Engineer / Leader

【Background of Recruitment】 With the electrification and intelligence of automobiles, in-vehicle SoCs have become a critical technology area that determines the value of a vehicle. The R-Car series has continued to evolve as large-scale, high-functionality in-vehicle SoCs that integrate numerous SoC IPs, such as CPUs, high-speed interfaces, memory, AI/video, functional safety, and security. In our department, in addition to in-house IP development, we are responsible for SoC IP development, including the selection, introduction, and integration of external IPs. The SoC bus/interconnect is a core area that supports the performance and quality of the entire SoC. As the scale of development and technical difficulty increase, we need to strengthen our design talent who can consistently proceed with specification study, logic design, verification, and performance evaluation, while solving technical issues in collaboration with peripheral teams and IP vendors. In this recruitment, we welcome engineers/leaders who will be involved in the practical development of SoC buses/interconnects, deepening their expertise while leading development by overseeing their assigned area or the entire subsystem.

【Job Description】

• Responsible for the practical development of SoC buses/interconnects in in-vehicle SoCs (R-Car series).
• Involved in specification study, architecture study, RTL design, verification, debugging, and performance evaluation for on-chip buses such as AXI and NoC.
• Organize connection requirements for CPUs, memory, AI/image processing, high-speed interfaces, peripheral IPs, etc., and perform design considering bandwidth, latency, QoS, deadlock avoidance, error handling, etc.
• Analyze bottlenecks using traffic models and performance evaluation results, and promote design improvements toward the overall SoC performance targets.
• Depending on experience, formulate design policies for the assigned area, conduct design reviews, and summarize technical issues, leading consensus building with stakeholders.
• When introducing external interconnect IPs, responsible for specification confirmation with IP vendors, configuration study, organization of constraints, integration, and handling technical issues.
• Play a role within a global development structure by collaborating in English with design bases in Japan, India, and Vietnam.

*Note: Details regarding the scope of changes in the workplace and the scope of changes in the duties to be performed will be provided during the selection process.

【MUST】

• 5 or more years of practical experience in digital circuit design or verification in SoC or IP development (RTL design, verification, debugging, specification study, design review support, etc.).
• Design or verification experience related to buses, interconnects, NoC, or data transfer circuits.
• Experience in understanding design specifications and technical documents and translating requirement specifications into circuit specifications and verification items.
• Experience in collaborating with stakeholders inside and outside the team and addressing issues through technical discussions.
• Experience in organizing design policies and technical issues in the assigned area and building consensus with stakeholders.
• No resistance to reading and writing technical documents in English or communicating professionally with global teams.

【WANT】

• Knowledge/experience regarding protocols such as AMBA AXI/ACE/CHI, or NoC architecture.
• Design/verification experience in QoS, bandwidth control, address maps, security/access control, error handling, performance counters, etc.
• Experience in performance evaluation and bottleneck analysis using traffic analysis, performance models, simulations, etc.
• Knowledge/experience regarding cache coherency, memory subsystems, CPU subsystems, DMA, etc.
• Experience in technical coordination or leading at the subsystem or IP level.
• Experience in integrating external IPs, organizing constraints, and handling technical issues with IP vendors.
• Knowledge of power domain design and physical design (P&R).
• Experience in developing in-vehicle SoCs or products with high functional safety, quality, and reliability requirements.

Renesas is a global company providing embedded semiconductor solutions under the Purpose "To Make Our Lives Easier." Together with more than 21,000 engineers and problem-solving professionals active in over 30 countries, we are involved in developing world-leading technologies in the automotive, industrial, infrastructure, and IoT fields, contributing to the realization of a safer, healthier, more environmentally friendly, and smarter future.

At Renesas, "TAGIE (Transparent, Agile, Global, Innovative, Entrepreneurial)" is at the core of our corporate culture. TAGIE represents the shared values that support our way of working, our growth, and our efforts toward achieving our Purpose. This collaborative spirit and challenging mindset enable industrial transformation through semiconductor technology and contribute to the lives of people around the world.

In addition to a competitive compensation system, we offer comprehensive benefits. Details regarding benefits will be provided during the selection process.

Why not join us in the challenge of creating the future? We look forward to your application.