Embedded AI Engineer

FONTES SINGAPORE PRIVATE LIMITEDSingaporemycareersfuturepublished 11/01/2026
Must-have:PythonAgileAI

About the Role We are looking for an Embedded AI Engineer to build, optimize, and deploy neural networks on ultra-low-power, memory-constrained SoCs and AI accelerators. This role sits at the intersection of AI, embedded systems, and silicon — converting trained models into highly efficient on-device inference pipelines for battery-powered and always-on edge applications across vision, audio, activity, and time-series domains.

Responsibilities

  • Deploy AI models onto resource-constrained, proprietary SoC designs
  • Optimize models across memory, power, and latency dimensions
  • Execute model quantization at INT8 or lower precision
  • Map neural networks to microcontrollers, DSPs, and AI accelerators
  • Build inference pipelines in bare metal or Zephyr OS (advantageous)
  • Validate embedded inference outputs against Python reference models
  • Diagnose and resolve numerical mismatches between floating-point and quantized inference
  • Tune memory layout, buffer reuse strategies, and tensor ordering
  • Work closely with hardware and firmware engineering teams

Requirements

  • Solid grounding in machine learning fundamentals
  • Practical experience deploying AI on embedded or edge hardware
  • Strong proficiency in C/C++ (embedded context) and Python
  • Hands-on experience with quantization techniques — PTQ or QAT
  • Familiarity with memory-constrained system design
  • Demonstrated ability to optimize for latency, memory footprint, and power draw

Bonus Skills

  • Exposure to TensorFlow Lite Micro, TVM, CMSIS-NN, or ONNX Runtime
  • Knowledge of RISC-V architecture or custom AI accelerator design
  • Experience with edge sensors — audio, IMU, vision, or wearables
  • Background in power profiling and power optimization workflows
  • Agile development exposure

Why Join

  • Work directly on production silicon and real edge-AI systems
  • Build AI designed to run for months or years on battery power
  • Direct collaboration with chip architects and systems engineers
  • End-to-end ownership from model training to silicon deployment
  • High-impact position within a fast-moving deep-tech environment