Electronics Engineer

Responsibilities:

• Implementation of video signal processing algorithms on FPGA and/or microcontroller;
• Debugging of obtained firmware using software test modules or hardware debuggers;
• Development of electrical schematic diagrams for selected FPGA and/or microcontrollers;
• Formation of requirements for PCB layout;
• Development of operational documentation and setup instructions;

Requirements:

• Higher technical education.
• Knowledge of C language constructs necessary for microcontroller programming.
• Knowledge of basic synthesizable and non-synthesizable VHDL and/or SystemVerilog (Verilog) constructs.
• SystemVerilog (Verilog) is preferred.
• Knowledge of the basics of FPGA timing analysis (TimeQuest Timing Analyzer, etc.), ability to write .sdc files.
• Experience working in Altera/Intel Quartus II and above. (If experience is only in Xilinx environments (ISE and Vivado), the candidacy will also be considered).
• Experience writing HDL tests for FPGA projects.
• Experience working with standard interfaces (I2C, SPI, SMBus, RS485, Ethernet, USB, etc.).
• Ability to write clear and structured code (e.g., variable names are related to the stored value, code fragments have comments, the code structure allows understanding the working algorithm, the project is divided into functional blocks, and repeating procedures and functions are moved to separate libraries and called in executable files).
• Knowledge of the basics of circuit design.
• Understanding of the basics of signal integrity.
• Technical English.
• PC proficiency: PCAD/Altium Designer (for electrical schematic development and data exchange with the PCB designer); Quartus II/Quartus Prime (for using TimeQuest Timing Analyzer, Megawizard/IP Catalog, SignalTap; experience in Qsys/Platform Designer, Nios II Software Build Tools for Eclipse is desirable); Keil uVision/AVR Studio/Eclipse or another development environment for microcontrollers (for project creation and debugging).

Conditions:

• Employment in accordance with the Labor Code of the Russian Federation.
• 5/2 work schedule, from 9:00 to 18:00, on Friday - until 16:45.
• Voluntary medical insurance.
• Canteen on the enterprise premises.
• Comfortable working conditions, friendly team.

Requirements

Not specified; Experience: 0 years