Layout Engineer

Job Responsibilities:

Develop digital and analog layout in various technologies (e.g., CMOS )

Layout analog circuits and IO circuits

Analyse and rectify layout verification issues

Support the front-end team for System-on-Chip (SoC) integration

Requirements:

Possess at least a bachelor’s degree or equivalent in Electrical & Electronic Engineering or any related field with background on Integrated Circuit Design (both Analog and Digital)

5 years or above experience in the area of layout design.

Knowledge in Electronic Design Automation (EDA) tools (e.g. Cadence, Synopsys, Mentor Graphic Calibre)

Knowledge in circuit reliability consideration for layout (e.g., ESD, latch-up, aging, EMIR)

Able to trouble-shoot and rectify layout verification error on DRC/LVS and familiar with layout signoff flow.

Strong Communication skills, high level of independence, self-motivation and a good team player.