Digital Verification Eng. - DDR/LPDDR IF Protocols

We are seeking a Digital Verification Engineer to perform subsystem and IP‑level functional verification of high‑speed interface protocol blocks in our AI chips - namely DDR/LPDDR Memory Interfaces.

You will join a team of highly skilled verification engineers to deliver sign‑off‑quality designs, collaborating closely with RTL design, SoC architecture, firmware, and other verification teams. This is a hands-on execution role requiring technical expertise and task ownership.

Key Responsibilities

• Set up, and debug functional verification environments across multiple design blocks and subsystem levels.
• Verify, confirm and report on expected behaviors of AMBA and high‑speed interfaces (DDR/LPDDR).
• Debug mismatches between RTL, DV models, and specifications, ensuring functional correctness and compliance.
• Develop and maintain UVM‑based testbenches, scripts, and flows to automate verification compile/run cycles.
• Triage and root‑cause simulation failures, track bugs, and work on closure with other team members.
• Optimize simulation runtime, capacity, and compile turnaround for large‑scale designs.
• Help maintain detailed documentation of methodologies, flows, and known issues.

Requirements

• Bachelor’s or Master’s degree in Electrical or Computer Engineering (or related field).
• 5+ years of experience in ASIC/SoC design verification, with recent focus on high‑speed protocols (DDR/LPDDR, PCIe, UCIe, SerDes).
• Experience with on‑chip bus protocols (AXI, CXS, AHB, CHI, etc.).
• Proven experience developing UVM‑based testbenches and driving coverage‑driven sign‑off flows.
• Reasonable understanding of digital design fundamentals and SoC microarchitectures.
• Proficiency in Verilog/SystemVerilog and simulation tools (VCS, Xcelium, Questa).
• Strong debugging and problem‑solving skills, with the ability to work independently on complex challenges.

Preferred Qualifications

• Experience using AI‑assisted tools for design verification and regression analysis.
• Familiarity with version control systems (Git, Perforce) and job scheduling frameworks (LSF, Grid Engine).
• Strong scripting skills in Perl, Python, or TCL for automation and debug workflows.
• Excellent communication and documentation skills.

Why Semidynamics?

• Join one of Europe’s most promising deep‑tech semiconductor startups, building AI chips from silicon to systems.
• Accelerated career growth and technical ownership.
• Hybrid work model: 4 days in the Barcelona office (city center), 1 day WFH, plus 1 week / annum of “work from anywhere.”
• Competitive compensation and benefits.
• A collaborative, technically driven environment that values clarity, ownership, and innovation.